Design and Analysis of Adders using Nanotechnology Based Quantum dot Cellular Automata

Abstract

Problem statement: The area and complexity are the major issues in circuit design. Here, we propose different types of adder designs based on Quantum dot Cellular Automata (QCA) that reduces number of QCA cells and area compare to previous designs. The quantum dot cellular automata is a novel computing paradigm in nanotechnology that can implement digital circuits with faster speed, smaller size and low power consumption. By taking the advantages of QCA we are able to design interesting computational architectures. The QCA cell is a basic building block of nanotechnology that can be used to make gates, wires and memories. The basic logic circuits used in this technology are the inverter and the Majority Gate (MG), using this other logical circuits can be designed. Approach: In this paper, the adders such as half, full and serial bit were designed and analyzed. These structures were designed with minimum number of cells by using cell minimization techniques. The techniques are (1) using two cells inverter and (2) suitable arrangement of cells without overlapping of neighboring cells. The proposed method can be used to minimize area and complexity. Results: These circuits were designed by majority gate and implemented by QCA cells. Then, they simulated using QCA Designer. The simulated results were verified according to the truth table. Conclusion: The performance analyses of those circuits are compared according to complexity, area and number of clock cycles and are also compared with previous designs.